The present invention relates to an access circuit for accessing a buffer memory in accordance with a command from an external circuit.
FIG. 1 is a block diagram showing an access circuit 220 and its peripheral circuits, which are used in a prior art digital versatile disc (DVD) recording-reproducing device. A control unit 200 controls each circuit of the recoding-reproducing device. A buffer RAM 210 temporarily stores data, which is recorded to a DVD or which is reproduced from the DVD. The control unit 200 retrieves the data recorded in the buffer RAM 210 via the access circuit 220. The control unit 200 also directly rewrites the data stored in the buffer RAM 210.
When accessing the buffer RAM 210, the control unit 200 designates the head address of the data storage section in the RAM 210 that the control unit 200 is trying to access. From the head address, the access circuit 220 accesses one word of data in the data storage section. In such a manner, to access the buffer RAM 210, the control unit 200 designates the head address of a data storage section and whether it will write data or read data.
The unit of data quantity (data length) transferred between the prior art access circuit 220 and the buffer RAM 210 is fixed at one word. This may lengthen the time for accessing the control unit 200 and the buffer RAM 210.
For example, the following procedures are taken when re-writing one byte of data in the buffer RAM 210. The access circuit 220 first reads one word of data from the buffer RAM 210. The control unit 200 then rewrites just one byte of the read data. The access circuit 220 then writes the rewritten one byte of data and the remaining byte of the read data to the buffer RAM 210. In this manner, to change one byte of data, the access circuit 220 reads one word of data and after the control unit 200 rewrites one byte of the data, writes one word of data to the buffer RAM 210. This increases the time for accessing the buffer RAM 210 and is thus inefficient.
Further, when the control unit 200 successively accesses two words, for each word, the control unit 200 designates the head address of the data that is to be accessed via the access circuit 220. In other words, even if the two words of data are recorded in continuous recording sections of the buffer RAM 210, the control unit 200 must designate addresses twice. This increases the time for accessing the buffer RAM and is thus inefficient.
In addition to a DVD recording-reproducing device, the same problem occurs in an access circuit that accesses a buffer memory in accordance with a command from an external circuit.